451 lines
13 KiB
C
451 lines
13 KiB
C
/*
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* Header file for sonic.c
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*
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* (C) Waldorf Electronics, Germany
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* Written by Andreas Busse
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*
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* NOTE: most of the structure definitions here are endian dependent.
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* If you want to use this driver on big endian machines, the data
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* and pad structure members must be exchanged. Also, the structures
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* need to be changed accordingly to the bus size.
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*
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* 981229 MSch: did just that for the 68k Mac port (32 bit, big endian)
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*
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* 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction
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* does not cope with 16-bit bus sizes very well. Therefore I have
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* rewritten it with ugly macros and evil inlines.
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*
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* 050625 Finn Thain: introduced more 32-bit cards and dhd's support
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* for 16-bit cards (from the mac68k project).
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*/
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#ifndef SONIC_H
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#define SONIC_H
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/*
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* SONIC register offsets
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*/
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#define SONIC_CMD 0x00
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#define SONIC_DCR 0x01
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#define SONIC_RCR 0x02
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#define SONIC_TCR 0x03
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#define SONIC_IMR 0x04
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#define SONIC_ISR 0x05
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#define SONIC_UTDA 0x06
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#define SONIC_CTDA 0x07
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#define SONIC_URDA 0x0d
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#define SONIC_CRDA 0x0e
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#define SONIC_EOBC 0x13
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#define SONIC_URRA 0x14
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#define SONIC_RSA 0x15
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#define SONIC_REA 0x16
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#define SONIC_RRP 0x17
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#define SONIC_RWP 0x18
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#define SONIC_RSC 0x2b
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#define SONIC_CEP 0x21
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#define SONIC_CAP2 0x22
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#define SONIC_CAP1 0x23
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#define SONIC_CAP0 0x24
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#define SONIC_CE 0x25
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#define SONIC_CDP 0x26
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#define SONIC_CDC 0x27
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#define SONIC_WT0 0x29
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#define SONIC_WT1 0x2a
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#define SONIC_SR 0x28
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/* test-only registers */
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#define SONIC_TPS 0x08
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#define SONIC_TFC 0x09
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#define SONIC_TSA0 0x0a
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#define SONIC_TSA1 0x0b
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#define SONIC_TFS 0x0c
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#define SONIC_CRBA0 0x0f
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#define SONIC_CRBA1 0x10
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#define SONIC_RBWC0 0x11
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#define SONIC_RBWC1 0x12
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#define SONIC_TTDA 0x20
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#define SONIC_MDT 0x2f
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#define SONIC_TRBA0 0x19
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#define SONIC_TRBA1 0x1a
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#define SONIC_TBWC0 0x1b
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#define SONIC_TBWC1 0x1c
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#define SONIC_LLFA 0x1f
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#define SONIC_ADDR0 0x1d
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#define SONIC_ADDR1 0x1e
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/*
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* Error counters
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*/
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#define SONIC_CRCT 0x2c
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#define SONIC_FAET 0x2d
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#define SONIC_MPT 0x2e
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#define SONIC_DCR2 0x3f
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/*
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* SONIC command bits
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*/
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#define SONIC_CR_LCAM 0x0200
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#define SONIC_CR_RRRA 0x0100
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#define SONIC_CR_RST 0x0080
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#define SONIC_CR_ST 0x0020
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#define SONIC_CR_STP 0x0010
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#define SONIC_CR_RXEN 0x0008
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#define SONIC_CR_RXDIS 0x0004
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#define SONIC_CR_TXP 0x0002
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#define SONIC_CR_HTX 0x0001
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/*
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* SONIC data configuration bits
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*/
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#define SONIC_DCR_EXBUS 0x8000
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#define SONIC_DCR_LBR 0x2000
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#define SONIC_DCR_PO1 0x1000
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#define SONIC_DCR_PO0 0x0800
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#define SONIC_DCR_SBUS 0x0400
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#define SONIC_DCR_USR1 0x0200
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#define SONIC_DCR_USR0 0x0100
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#define SONIC_DCR_WC1 0x0080
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#define SONIC_DCR_WC0 0x0040
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#define SONIC_DCR_DW 0x0020
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#define SONIC_DCR_BMS 0x0010
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#define SONIC_DCR_RFT1 0x0008
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#define SONIC_DCR_RFT0 0x0004
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#define SONIC_DCR_TFT1 0x0002
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#define SONIC_DCR_TFT0 0x0001
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/*
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* Constants for the SONIC receive control register.
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*/
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#define SONIC_RCR_ERR 0x8000
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#define SONIC_RCR_RNT 0x4000
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#define SONIC_RCR_BRD 0x2000
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#define SONIC_RCR_PRO 0x1000
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#define SONIC_RCR_AMC 0x0800
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#define SONIC_RCR_LB1 0x0400
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#define SONIC_RCR_LB0 0x0200
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#define SONIC_RCR_MC 0x0100
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#define SONIC_RCR_BC 0x0080
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#define SONIC_RCR_LPKT 0x0040
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#define SONIC_RCR_CRS 0x0020
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#define SONIC_RCR_COL 0x0010
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#define SONIC_RCR_CRCR 0x0008
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#define SONIC_RCR_FAER 0x0004
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#define SONIC_RCR_LBK 0x0002
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#define SONIC_RCR_PRX 0x0001
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#define SONIC_RCR_LB_OFF 0
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#define SONIC_RCR_LB_MAC SONIC_RCR_LB0
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#define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1
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#define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1)
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/* default RCR setup */
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#define SONIC_RCR_DEFAULT (SONIC_RCR_BRD)
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/*
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* SONIC Transmit Control register bits
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*/
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#define SONIC_TCR_PINTR 0x8000
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#define SONIC_TCR_POWC 0x4000
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#define SONIC_TCR_CRCI 0x2000
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#define SONIC_TCR_EXDIS 0x1000
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#define SONIC_TCR_EXD 0x0400
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#define SONIC_TCR_DEF 0x0200
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#define SONIC_TCR_NCRS 0x0100
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#define SONIC_TCR_CRLS 0x0080
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#define SONIC_TCR_EXC 0x0040
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#define SONIC_TCR_PMB 0x0008
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#define SONIC_TCR_FU 0x0004
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#define SONIC_TCR_BCM 0x0002
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#define SONIC_TCR_PTX 0x0001
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#define SONIC_TCR_DEFAULT 0x0000
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/*
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* Constants for the SONIC_INTERRUPT_MASK and
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* SONIC_INTERRUPT_STATUS registers.
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*/
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#define SONIC_INT_BR 0x4000
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#define SONIC_INT_HBL 0x2000
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#define SONIC_INT_LCD 0x1000
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#define SONIC_INT_PINT 0x0800
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#define SONIC_INT_PKTRX 0x0400
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#define SONIC_INT_TXDN 0x0200
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#define SONIC_INT_TXER 0x0100
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#define SONIC_INT_TC 0x0080
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#define SONIC_INT_RDE 0x0040
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#define SONIC_INT_RBE 0x0020
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#define SONIC_INT_RBAE 0x0010
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#define SONIC_INT_CRC 0x0008
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#define SONIC_INT_FAE 0x0004
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#define SONIC_INT_MP 0x0002
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#define SONIC_INT_RFO 0x0001
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/*
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* The interrupts we allow.
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*/
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#define SONIC_IMR_DEFAULT ( SONIC_INT_BR | \
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SONIC_INT_LCD | \
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SONIC_INT_RFO | \
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SONIC_INT_PKTRX | \
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SONIC_INT_TXDN | \
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SONIC_INT_TXER | \
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SONIC_INT_RDE | \
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SONIC_INT_RBAE | \
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SONIC_INT_CRC | \
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SONIC_INT_FAE | \
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SONIC_INT_MP)
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#define SONIC_EOL 0x0001
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#define CAM_DESCRIPTORS 16
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/* Offsets in the various DMA buffers accessed by the SONIC */
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#define SONIC_BITMODE16 0
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#define SONIC_BITMODE32 1
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#define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2)
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/* Note! These are all measured in bus-size units, so use SONIC_BUS_SCALE */
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#define SIZEOF_SONIC_RR 4
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#define SONIC_RR_BUFADR_L 0
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#define SONIC_RR_BUFADR_H 1
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#define SONIC_RR_BUFSIZE_L 2
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#define SONIC_RR_BUFSIZE_H 3
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#define SIZEOF_SONIC_RD 7
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#define SONIC_RD_STATUS 0
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#define SONIC_RD_PKTLEN 1
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#define SONIC_RD_PKTPTR_L 2
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#define SONIC_RD_PKTPTR_H 3
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#define SONIC_RD_SEQNO 4
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#define SONIC_RD_LINK 5
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#define SONIC_RD_IN_USE 6
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#define SIZEOF_SONIC_TD 8
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#define SONIC_TD_STATUS 0
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#define SONIC_TD_CONFIG 1
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#define SONIC_TD_PKTSIZE 2
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#define SONIC_TD_FRAG_COUNT 3
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#define SONIC_TD_FRAG_PTR_L 4
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#define SONIC_TD_FRAG_PTR_H 5
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#define SONIC_TD_FRAG_SIZE 6
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#define SONIC_TD_LINK 7
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#define SIZEOF_SONIC_CD 4
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#define SONIC_CD_ENTRY_POINTER 0
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#define SONIC_CD_CAP0 1
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#define SONIC_CD_CAP1 2
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#define SONIC_CD_CAP2 3
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#define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1)
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#define SONIC_CDA_CAM_ENABLE (CAM_DESCRIPTORS * SIZEOF_SONIC_CD)
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/*
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* Some tunables for the buffer areas. Power of 2 is required
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* the current driver uses one receive buffer for each descriptor.
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*
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* MSch: use more buffer space for the slow m68k Macs!
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*/
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#define SONIC_NUM_RRS 16 /* number of receive resources */
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#define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
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#define SONIC_NUM_TDS 16 /* number of transmit descriptors */
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#define SONIC_RDS_MASK (SONIC_NUM_RDS-1)
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#define SONIC_TDS_MASK (SONIC_NUM_TDS-1)
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#define SONIC_RBSIZE 1520 /* size of one resource buffer */
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/* Again, measured in bus size units! */
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#define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA \
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+ (SIZEOF_SONIC_TD * SONIC_NUM_TDS) \
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+ (SIZEOF_SONIC_RD * SONIC_NUM_RDS) \
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+ (SIZEOF_SONIC_RR * SONIC_NUM_RRS))
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/* Information that need to be kept for each board. */
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struct sonic_local {
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/* Bus size. 0 == 16 bits, 1 == 32 bits. */
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int dma_bitmode;
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/* Register offset within the longword (independent of endianness,
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and varies from one type of Macintosh SONIC to another
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(Aarrgh)) */
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int reg_offset;
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void *descriptors;
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/* Crud. These areas have to be within the same 64K. Therefore
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we allocate a desriptors page, and point these to places within it. */
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void *cda; /* CAM descriptor area */
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void *tda; /* Transmit descriptor area */
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void *rra; /* Receive resource area */
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void *rda; /* Receive descriptor area */
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struct sk_buff* volatile rx_skb[SONIC_NUM_RRS]; /* packets to be received */
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struct sk_buff* volatile tx_skb[SONIC_NUM_TDS]; /* packets to be transmitted */
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unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */
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/* Logical DMA addresses on MIPS, bus addresses on m68k
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* (so "laddr" is a bit misleading) */
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dma_addr_t descriptors_laddr;
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u32 cda_laddr; /* logical DMA address of CDA */
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u32 tda_laddr; /* logical DMA address of TDA */
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u32 rra_laddr; /* logical DMA address of RRA */
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u32 rda_laddr; /* logical DMA address of RDA */
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dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */
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dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */
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unsigned int rra_end;
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unsigned int cur_rwp;
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unsigned int cur_rx;
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unsigned int cur_tx; /* first unacked transmit packet */
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unsigned int eol_rx;
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unsigned int eol_tx; /* last unacked transmit packet */
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unsigned int next_tx; /* next free TD */
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struct device *device; /* generic device */
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struct net_device_stats stats;
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};
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#define TX_TIMEOUT (3 * HZ)
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/* Index to functions, as function prototypes. */
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static int sonic_open(struct net_device *dev);
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static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev);
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static irqreturn_t sonic_interrupt(int irq, void *dev_id);
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static void sonic_rx(struct net_device *dev);
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static int sonic_close(struct net_device *dev);
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static struct net_device_stats *sonic_get_stats(struct net_device *dev);
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static void sonic_multicast_list(struct net_device *dev);
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static int sonic_init(struct net_device *dev);
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static void sonic_tx_timeout(struct net_device *dev);
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/* Internal inlines for reading/writing DMA buffers. Note that bus
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size and endianness matter here, whereas they don't for registers,
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as far as we can tell. */
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/* OpenBSD calls this "SWO". I'd like to think that sonic_buf_put()
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is a much better name. */
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static inline void sonic_buf_put(void* base, int bitmode,
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int offset, __u16 val)
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{
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if (bitmode)
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#ifdef __BIG_ENDIAN
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((__u16 *) base + (offset*2))[1] = val;
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#else
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((__u16 *) base + (offset*2))[0] = val;
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#endif
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else
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((__u16 *) base)[offset] = val;
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}
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static inline __u16 sonic_buf_get(void* base, int bitmode,
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int offset)
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{
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if (bitmode)
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#ifdef __BIG_ENDIAN
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return ((volatile __u16 *) base + (offset*2))[1];
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#else
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return ((volatile __u16 *) base + (offset*2))[0];
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#endif
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else
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return ((volatile __u16 *) base)[offset];
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}
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/* Inlines that you should actually use for reading/writing DMA buffers */
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static inline void sonic_cda_put(struct net_device* dev, int entry,
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int offset, __u16 val)
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{
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struct sonic_local *lp = netdev_priv(dev);
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sonic_buf_put(lp->cda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_CD) + offset, val);
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}
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static inline __u16 sonic_cda_get(struct net_device* dev, int entry,
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int offset)
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{
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struct sonic_local *lp = netdev_priv(dev);
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return sonic_buf_get(lp->cda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_CD) + offset);
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}
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static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val)
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{
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struct sonic_local *lp = netdev_priv(dev);
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sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val);
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}
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static inline __u16 sonic_get_cam_enable(struct net_device* dev)
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{
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struct sonic_local *lp = netdev_priv(dev);
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return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE);
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}
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static inline void sonic_tda_put(struct net_device* dev, int entry,
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int offset, __u16 val)
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{
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struct sonic_local *lp = netdev_priv(dev);
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sonic_buf_put(lp->tda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_TD) + offset, val);
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}
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static inline __u16 sonic_tda_get(struct net_device* dev, int entry,
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int offset)
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{
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struct sonic_local *lp = netdev_priv(dev);
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return sonic_buf_get(lp->tda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_TD) + offset);
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}
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static inline void sonic_rda_put(struct net_device* dev, int entry,
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int offset, __u16 val)
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{
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struct sonic_local *lp = netdev_priv(dev);
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sonic_buf_put(lp->rda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_RD) + offset, val);
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}
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static inline __u16 sonic_rda_get(struct net_device* dev, int entry,
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int offset)
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{
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struct sonic_local *lp = netdev_priv(dev);
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return sonic_buf_get(lp->rda, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_RD) + offset);
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}
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static inline void sonic_rra_put(struct net_device* dev, int entry,
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int offset, __u16 val)
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{
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struct sonic_local *lp = netdev_priv(dev);
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sonic_buf_put(lp->rra, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_RR) + offset, val);
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}
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static inline __u16 sonic_rra_get(struct net_device* dev, int entry,
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int offset)
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{
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struct sonic_local *lp = netdev_priv(dev);
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return sonic_buf_get(lp->rra, lp->dma_bitmode,
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(entry * SIZEOF_SONIC_RR) + offset);
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}
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static const char *version =
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"sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";
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#endif /* SONIC_H */
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