107 lines
3.6 KiB
C
107 lines
3.6 KiB
C
/*
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* arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
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*
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* SH7722 hardware block support
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/suspend.h>
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#include <asm/hwblk.h>
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#include <cpu/sh7722.h>
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/* SH7722 registers */
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#define MSTPCR0 0xa4150030
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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/* SH7722 Power Domains */
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enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
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static struct hwblk_area sh7722_hwblk_area[] = {
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[CORE_AREA] = HWBLK_AREA(0, 0),
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[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
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[SUB_AREA] = HWBLK_AREA(0, 0),
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};
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/* Table mapping HWBLK to Module Stop Bit and Power Domain */
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static struct hwblk sh7722_hwblk[HWBLK_NR] = {
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[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
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[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
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[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
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[HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
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[HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
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[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
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[HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
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[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
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[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
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[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
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[HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
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[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
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[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
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[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
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[HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
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[HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
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[HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
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[HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
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[HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
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[HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
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[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
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[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
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[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
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[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
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[HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
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[HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
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[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
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[HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
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[HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
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[HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
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[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
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[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
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[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
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[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
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[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
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[HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
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[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
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[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
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};
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static struct hwblk_info sh7722_hwblk_info = {
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.areas = sh7722_hwblk_area,
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.nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
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.hwblks = sh7722_hwblk,
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.nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
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};
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int arch_hwblk_sleep_mode(void)
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{
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if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
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return SUSP_SH_STANDBY | SUSP_SH_SF;
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if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
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return SUSP_SH_SLEEP | SUSP_SH_SF;
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return SUSP_SH_SLEEP;
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}
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int __init arch_hwblk_init(void)
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{
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return hwblk_register(&sh7722_hwblk_info);
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}
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