112 lines
4.3 KiB
ArmAsm
112 lines
4.3 KiB
ArmAsm
/*
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* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Code Aurora Forum nor
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* the names of its contributors may be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* Alternatively, provided that this notice is retained in full, this software
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* may be relicensed by the recipient under the terms of the GNU General Public
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* License version 2 ("GPL") and only version 2, in which case the provisions of
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* the GPL apply INSTEAD OF those given above. If the recipient relicenses the
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* software under the GPL, then the identification text in the MODULE_LICENSE
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* macro must be changed to reflect "GPLv2" instead of "Dual BSD/GPL". Once a
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* recipient changes the license terms to the GPL, subsequent recipients shall
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* not relicense under alternate licensing terms, including the BSD or dual
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* BSD/GPL terms. In addition, the following license statement immediately
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* below and between the words START and END shall also then apply when this
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* software is relicensed under the GPL:
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*
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* START
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 and only version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* END
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* Function: v7_early_abort
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*
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* Params : r2 = address of aborted instruction
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* : r3 = saved SPSR
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*
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* Returns : r0 = address of abort
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* : r1 = FSR, bit 11 = write
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* : r2-r8 = corrupted
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* : r9 = preserved
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* : sp = pointer to registers
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*
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* Purpose : obtain information about current aborted instruction.
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*/
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.align 5
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ENTRY(v7_early_abort)
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/*
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* The effect of data aborts on on the exclusive access monitor are
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* UNPREDICTABLE. Do a CLREX to clear the state
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*/
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clrex
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mrc p15, 0, r1, c5, c0, 0 @ get FSR
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mrc p15, 0, r0, c6, c0, 0 @ get FAR
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/*
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* V6 code adjusts the returned DFSR.
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* New designs should not need to patch up faults.
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*/
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#if defined(CONFIG_VERIFY_PERMISSION_FAULT)
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/*
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* Detect erroneous permission failures and fix
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*/
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ldr r3, =0x40d @ On permission fault
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and r3, r1, r3
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cmp r3, #0x0d
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movne pc, lr
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mcr p15, 0, r0, c7, c8, 0 @ Retranslate FAR
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isb
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mrc p15, 0, r2, c7, c4, 0 @ Read the PAR
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and r3, r2, #0x7b @ On translation fault
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cmp r3, #0x0b
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movne pc, lr
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bic r1, r1, #0xf @ Fix up FSR FS[5:0]
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and r2, r2, #0x7e
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orr r1, r1, r2, LSR #1
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#endif
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mov pc, lr
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ENDPROC(v7_early_abort)
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