From fd5e7d82376f1d78e7e8202a968fcefb505be51d Mon Sep 17 00:00:00 2001
From: securecrt <securecrt2008@gmail.com>
Date: Wed, 20 Jun 2012 12:25:12 +0800
Subject: [PATCH] msm: kgsl: let postmortem dump find context switch IBs
 Because the IBs used for context switching are not allocated by userspace, a
 separate search is needed to find them in adreno_find_region.

---
 drivers/gpu/msm/adreno.c | 33 +++++++++++++++++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 39f3004d..58fee45f 100755
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -928,6 +928,8 @@ const struct kgsl_memdesc *adreno_find_region(struct kgsl_device *device,
 	struct kgsl_process_private *priv;
 	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
 	struct adreno_ringbuffer *ringbuffer = &adreno_dev->ringbuffer;
+	struct kgsl_context *context;
+	int next = 0;
 
 	if (kgsl_gpuaddr_in_memdesc(&ringbuffer->buffer_desc, gpuaddr, size))
 		return &ringbuffer->buffer_desc;
@@ -959,11 +961,38 @@ const struct kgsl_memdesc *adreno_find_region(struct kgsl_device *device,
 	list_for_each_entry(entry, &device->memqueue, list) {
 		if (kgsl_gpuaddr_in_memdesc(&entry->memdesc, gpuaddr, size)) {
 			result = &entry->memdesc;
-			break;
+			return result;
 		}
 
 	}
-	return result;
+
+	while (1) {
+		struct adreno_context *adreno_context = NULL;
+		context = idr_get_next(&device->context_idr, &next);
+		if (context == NULL)
+			break;
+
+		adreno_context = (struct adreno_context *)context->devctxt;
+
+		if (kgsl_mmu_pt_equal(adreno_context->pagetable, pt_base)) {
+			struct kgsl_memdesc *desc;
+
+			desc = &adreno_context->gpustate;
+			if (kgsl_gpuaddr_in_memdesc(desc, gpuaddr, size)) {
+				result = desc;
+				return result;
+		}
+
+			desc = &adreno_context->context_gmem_shadow.gmemshadow;
+			if (kgsl_gpuaddr_in_memdesc(desc, gpuaddr, size)) {
+				result = desc;
+				return result;
+			}
+	}
+		next = next + 1;
+	}
+
+	return NULL;
 
 }