diff --git a/drivers/video/msm/mdp_lcdc.c b/drivers/video/msm/mdp_lcdc.c
index 4bf5e398..8a90d12e 100644
--- a/drivers/video/msm/mdp_lcdc.c
+++ b/drivers/video/msm/mdp_lcdc.c
@@ -163,6 +163,7 @@ static int lcdc_hw_init(struct mdp_lcdc_info *lcdc)
 	clk_set_rate(lcdc->pclk, lcdc->parms.clk_rate);
 	clk_set_rate(lcdc->pad_pclk, lcdc->parms.clk_rate);
 
+#ifndef CONFIG_MACH_HTCLEO
 	/* write the lcdc params */
 	mdp_writel(lcdc->mdp, lcdc->parms.hsync_ctl, MDP_LCDC_HSYNC_CTL);
 	mdp_writel(lcdc->mdp, lcdc->parms.vsync_period, MDP_LCDC_VSYNC_PERIOD);
@@ -189,24 +190,17 @@ static int lcdc_hw_init(struct mdp_lcdc_info *lcdc)
 
 	mdp_writel(lcdc->mdp, 0, MDP_DMA_P_OUT_XY);
 
-	if(machine_is_htcleo()) {
-		dma_cfg = DMA_PACK_ALIGN_MSB |
-			DMA_PACK_PATTERN_RGB;
+	dma_cfg = mdp_readl(lcdc->mdp, MDP_DMA_P_CONFIG);
+	if (lcdc->pdata->overrides & MSM_MDP_LCDC_DMA_PACK_ALIGN_LSB)
+		dma_cfg &= ~DMA_PACK_ALIGN_MSB;
+	else
+		dma_cfg |= DMA_PACK_ALIGN_MSB;
 
-		dma_cfg |= DMA_OUT_SEL_LCDC;
-		dma_cfg &= ~DMA_DST_BITS_MASK;
-	} else {
-		dma_cfg = mdp_readl(lcdc->mdp, MDP_DMA_P_CONFIG);
-		if (lcdc->pdata->overrides & MSM_MDP_LCDC_DMA_PACK_ALIGN_LSB)
-			dma_cfg &= ~DMA_PACK_ALIGN_MSB;
-		else
-			dma_cfg |= DMA_PACK_ALIGN_MSB;
+	dma_cfg |= (DMA_PACK_PATTERN_RGB |
+		  DMA_DITHER_EN);
+	dma_cfg |= DMA_OUT_SEL_LCDC;
+	dma_cfg &= ~DMA_DST_BITS_MASK;
 
-		dma_cfg |= (DMA_PACK_PATTERN_RGB |
-			  DMA_DITHER_EN);
-		dma_cfg |= DMA_OUT_SEL_LCDC;
-		dma_cfg &= ~DMA_DST_BITS_MASK;
-	}
 	if(lcdc->color_format == MSM_MDP_OUT_IF_FMT_RGB565)
 		dma_cfg |= DMA_DSTC0G_6BITS | DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
 	else if (lcdc->color_format == MSM_MDP_OUT_IF_FMT_RGB666)
@@ -216,7 +210,7 @@ static int lcdc_hw_init(struct mdp_lcdc_info *lcdc)
 
 	/* enable the lcdc timing generation */
 	mdp_writel(lcdc->mdp, 1, MDP_LCDC_EN);
-
+#endif
 	return 0;
 }