From b8b23555a291fa92fa9c6a24ac48b7b118bce56c Mon Sep 17 00:00:00 2001 From: Martijn Stolk Date: Wed, 7 Jul 2010 17:32:22 +0200 Subject: [PATCH] msm: timer: fix initialization of timers Timers were previously initialised with writing 0 to the CLEAR reg. However to succesfully clear the timer, one should write 1 to this reg. --- arch/arm/mach-msm/timer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index a1ed7a17..25a1af47 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -688,7 +688,9 @@ static void __init msm_timer_init(void) struct clock_event_device *ce = &clock->clockevent; struct clocksource *cs = &clock->clocksource; writel(0, clock->regbase + TIMER_ENABLE); - writel(0, clock->regbase + TIMER_CLEAR); + // The timer should be cleared by setting the first bit. + writel(1, clock->regbase + TIMER_CLEAR); + writel(0, clock->regbase + TIMER_COUNT_VAL); writel(~0, clock->regbase + TIMER_MATCH_VAL); while (msm_read_timer_count(clock)) ; /* wait for clock to clear */