109 lines
2.0 KiB
ArmAsm
109 lines
2.0 KiB
ArmAsm
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/*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later
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*/
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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#include <asm/errno.h>
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#include <asm/blackfin.h>
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#include <asm/asm-offsets.h>
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#include <asm/context.S>
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#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
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.section .l1.text
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#else
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.text
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#endif
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ENTRY(_ret_from_fork)
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#ifdef CONFIG_IPIPE
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/*
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* Hw IRQs are off on entry, and we don't want the scheduling tail
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* code to starve high priority domains from interrupts while it
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* runs. Therefore we first stall the root stage to have the
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* virtual interrupt state reflect IMASK.
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*/
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p0.l = ___ipipe_root_status;
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p0.h = ___ipipe_root_status;
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r4 = [p0];
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bitset(r4, 0);
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[p0] = r4;
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/*
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* Then we may enable hw IRQs, allowing preemption from high
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* priority domains. schedule_tail() will do local_irq_enable()
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* since Blackfin does not define __ARCH_WANT_UNLOCKED_CTXSW, so
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* there is no need to unstall the root domain by ourselves
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* afterwards.
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*/
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p0.l = _bfin_irq_flags;
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p0.h = _bfin_irq_flags;
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r4 = [p0];
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sti r4;
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#endif /* CONFIG_IPIPE */
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SP += -12;
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call _schedule_tail;
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SP += 12;
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r0 = [sp + PT_IPEND];
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cc = bittst(r0,1);
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if cc jump .Lin_kernel;
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RESTORE_CONTEXT
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rti;
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.Lin_kernel:
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bitclr(r0,1);
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[sp + PT_IPEND] = r0;
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/* do a 'fake' RTI by jumping to [RETI]
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* to avoid clearing supervisor mode in child
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*/
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r0 = [sp + PT_PC];
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[sp + PT_P0] = r0;
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RESTORE_ALL_SYS
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jump (p0);
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ENDPROC(_ret_from_fork)
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ENTRY(_sys_fork)
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r0 = -EINVAL;
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#if (ANOMALY_05000371)
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nop;
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nop;
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nop;
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#endif
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rts;
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ENDPROC(_sys_fork)
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ENTRY(_sys_vfork)
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r0 = sp;
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r0 += 24;
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[--sp] = rets;
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SP += -12;
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call _bfin_vfork;
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SP += 12;
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rets = [sp++];
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rts;
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ENDPROC(_sys_vfork)
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ENTRY(_sys_clone)
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r0 = sp;
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r0 += 24;
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[--sp] = rets;
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SP += -12;
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call _bfin_clone;
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SP += 12;
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rets = [sp++];
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rts;
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ENDPROC(_sys_clone)
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ENTRY(_sys_rt_sigreturn)
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r0 = sp;
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r0 += 24;
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[--sp] = rets;
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SP += -12;
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call _do_rt_sigreturn;
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SP += 12;
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rets = [sp++];
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rts;
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ENDPROC(_sys_rt_sigreturn)
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