60 lines
1.1 KiB
ArmAsm
60 lines
1.1 KiB
ArmAsm
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/*
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* arch/sh/kernel/cpu/ubc.S
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*
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* Set of management routines for the User Break Controller (UBC)
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*
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* Copyright (C) 2002 Paul Mundt
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/linkage.h>
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#include <asm/ubc.h>
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#define STBCR2 0xffc00010
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ENTRY(ubc_sleep)
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mov #0, r0
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mov.l 1f, r1 ! Zero out UBC_BBRA ..
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mov.w r0, @r1
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mov.l 2f, r1 ! .. same for BBRB ..
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mov.w r0, @r1
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mov.l 3f, r1 ! .. and again for BRCR.
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mov.w r0, @r1
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mov.w @r1, r0 ! Dummy read BRCR
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mov.l 4f, r1 ! Set MSTP5 in STBCR2
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mov.b @r1, r0
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or #0x01, r0
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mov.b r0, @r1
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mov.b @r1, r0 ! Two dummy reads ..
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mov.b @r1, r0
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rts
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nop
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ENTRY(ubc_wakeup)
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mov.l 4f, r1 ! Clear MSTP5
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mov.b @r1, r0
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and #0xfe, r0
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mov.b r0, @r1
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mov.b @r1, r0 ! Two more dummy reads ..
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mov.b @r1, r0
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rts
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nop
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1: .long UBC_BBRA
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2: .long UBC_BBRB
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3: .long UBC_BRCR
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4: .long STBCR2
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