238 lines
5.1 KiB
ArmAsm
238 lines
5.1 KiB
ArmAsm
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm-generic/vmlinux.lds.h>
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#define IVT_TEXT \
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VMLINUX_SYMBOL(__start_ivt_text) = .; \
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*(.text.ivt) \
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VMLINUX_SYMBOL(__end_ivt_text) = .;
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OUTPUT_FORMAT("elf64-ia64-little")
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OUTPUT_ARCH(ia64)
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ENTRY(phys_start)
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jiffies = jiffies_64;
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PHDRS {
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code PT_LOAD;
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percpu PT_LOAD;
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data PT_LOAD;
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note PT_NOTE;
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unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
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}
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SECTIONS
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{
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/* unwind exit sections must be discarded before the rest of the
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sections get included. */
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/DISCARD/ : {
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*(.IA_64.unwind.exit.text)
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*(.IA_64.unwind_info.exit.text)
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*(.comment)
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*(.note)
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}
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v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
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phys_start = _start - LOAD_OFFSET;
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code : { } :code
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. = KERNEL_START;
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_text = .;
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_stext = .;
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.text : AT(ADDR(.text) - LOAD_OFFSET)
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{
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IVT_TEXT
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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*(.gnu.linkonce.t*)
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}
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.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
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{ *(.text2) }
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#ifdef CONFIG_SMP
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.text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
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{ *(.text.lock) }
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#endif
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_etext = .;
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/* Read-only data */
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NOTES :code :note /* put .notes in text and mark in PT_NOTE */
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code_continues : {} :code /* switch back to regular program... */
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EXCEPTION_TABLE(16)
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/* MCA table */
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. = ALIGN(16);
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__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
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{
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__start___mca_table = .;
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*(__mca_table)
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__stop___mca_table = .;
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}
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.data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
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{
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__start___phys_stack_reg_patchlist = .;
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*(.data.patch.phys_stack_reg)
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__end___phys_stack_reg_patchlist = .;
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}
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/* Global data */
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_data = .;
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/* Unwind info & table: */
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. = ALIGN(8);
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.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
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{ *(.IA_64.unwind_info*) }
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.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
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{
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__start_unwind = .;
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*(.IA_64.unwind*)
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__end_unwind = .;
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} :code :unwind
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code_continues2 : {} : code
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RODATA
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.opd : AT(ADDR(.opd) - LOAD_OFFSET)
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{ *(.opd) }
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/* Initialization code and data: */
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(16)
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.data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
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{
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__start___vtop_patchlist = .;
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*(.data.patch.vtop)
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__end___vtop_patchlist = .;
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}
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.data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET)
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{
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__start___rse_patchlist = .;
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*(.data.patch.rse)
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__end___rse_patchlist = .;
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}
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.data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
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{
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__start___mckinley_e9_bundles = .;
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*(.data.patch.mckinley_e9)
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__end___mckinley_e9_bundles = .;
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}
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#if defined(CONFIG_PARAVIRT)
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. = ALIGN(16);
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.paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET)
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{
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__start_paravirt_bundles = .;
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*(.paravirt_bundles)
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__stop_paravirt_bundles = .;
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}
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. = ALIGN(16);
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.paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET)
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{
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__start_paravirt_insts = .;
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*(.paravirt_insts)
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__stop_paravirt_insts = .;
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}
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. = ALIGN(16);
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.paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET)
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{
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__start_paravirt_branches = .;
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*(.paravirt_branches)
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__stop_paravirt_branches = .;
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}
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#endif
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#if defined(CONFIG_IA64_GENERIC)
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/* Machine Vector */
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. = ALIGN(16);
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.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
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{
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machvec_start = .;
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*(.machvec)
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machvec_end = .;
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}
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#endif
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
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{
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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. = ALIGN(PAGE_SIZE);
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__start_gate_section = .;
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*(.data.gate)
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__stop_gate_section = .;
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#ifdef CONFIG_XEN
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. = ALIGN(PAGE_SIZE);
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__xen_start_gate_section = .;
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*(.data.gate.xen)
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__xen_stop_gate_section = .;
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#endif
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}
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. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
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* kernel data
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*/
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/* Per-cpu data: */
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. = ALIGN(PERCPU_PAGE_SIZE);
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PERCPU_VADDR(PERCPU_ADDR, :percpu)
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__phys_per_cpu_start = __per_cpu_load;
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. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
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* into percpu page size
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*/
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data : { } :data
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.data : AT(ADDR(.data) - LOAD_OFFSET)
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{
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#ifdef CONFIG_SMP
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. = ALIGN(PERCPU_PAGE_SIZE);
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__cpu0_per_cpu = .;
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. = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */
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#endif
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INIT_TASK_DATA(PAGE_SIZE)
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CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
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READ_MOSTLY_DATA(SMP_CACHE_BYTES)
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DATA_DATA
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*(.data1)
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*(.gnu.linkonce.d*)
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CONSTRUCTORS
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}
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. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
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.got : AT(ADDR(.got) - LOAD_OFFSET)
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{ *(.got.plt) *(.got) }
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__gp = ADDR(.got) + 0x200000;
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/* We want the small data sections together, so single-instruction offsets
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can access them all, and initialized data all before uninitialized, so
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we can shorten the on-disk segment size. */
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.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
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{ *(.sdata) *(.sdata1) *(.srdata) }
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_edata = .;
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BSS_SECTION(0, 0, 0)
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_end = .;
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code : { } :code
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STABS_DEBUG
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DWARF_DEBUG
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/* Default discards */
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DISCARDS
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}
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