66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
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#ifndef ___ASM_SPARC_DMA_MAPPING_H
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#define ___ASM_SPARC_DMA_MAPPING_H
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#include <linux/scatterlist.h>
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#include <linux/mm.h>
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#include <linux/dma-debug.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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extern int dma_supported(struct device *dev, u64 mask);
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extern int dma_set_mask(struct device *dev, u64 dma_mask);
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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extern struct dma_map_ops *dma_ops, pci32_dma_ops;
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extern struct bus_type pci_bus_type;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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#if defined(CONFIG_SPARC32) && defined(CONFIG_PCI)
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if (dev->bus == &pci_bus_type)
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return &pci32_dma_ops;
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#endif
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return dma_ops;
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}
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#include <asm-generic/dma-mapping-common.h>
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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void *cpu_addr;
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cpu_addr = ops->alloc_coherent(dev, size, dma_handle, flag);
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free_coherent(dev, size, cpu_addr, dma_handle);
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}
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return (dma_addr == DMA_ERROR_CODE);
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}
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static inline int dma_get_cache_alignment(void)
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{
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/*
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* no easy way to get cache size on all processors, so return
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* the maximum possible, to be safe
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*/
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return (1 << INTERNODE_CACHE_SHIFT);
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}
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#endif
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