197 lines
5.8 KiB
C
197 lines
5.8 KiB
C
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/* arch/arm/mach-msm/board-supersonic.h
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*
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* Copyright (C) 2009 HTC Corporation.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_BOARD_SUPERSONIC_H
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#define __ARCH_ARM_MACH_MSM_BOARD_SUPERSONIC_H
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#include <mach/board.h>
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#define MSM_SMI_BASE 0x02B00000
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#define MSM_SMI_SIZE 0x01500000
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#define MSM_HDMI_FB_BASE 0x02B00000
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#define MSM_HDMI_FB_SIZE 0x00400000
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#define MSM_PMEM_VENC_BASE 0x02F00000
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#define MSM_PMEM_VENC_SIZE 0x00800000
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#define MSM_GPU_MEM_BASE 0x03700000
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#define MSM_GPU_MEM_SIZE 0x00300000
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#define MSM_RAM_CONSOLE_BASE 0x03A00000
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#define MSM_RAM_CONSOLE_SIZE 0x00040000
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#ifdef CONFIG_BUILD_CIQ
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#define MSM_PMEM_CIQ_BASE MSM_RAM_CONSOLE_BASE + MSM_RAM_CONSOLE_SIZE
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#define MSM_PMEM_CIQ_SIZE SZ_64K
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#define MSM_PMEM_CIQ1_BASE MSM_PMEM_CIQ_BASE
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#define MSM_PMEM_CIQ1_SIZE MSM_PMEM_CIQ_SIZE
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#define MSM_PMEM_CIQ2_BASE MSM_PMEM_CIQ_BASE
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#define MSM_PMEM_CIQ2_SIZE MSM_PMEM_CIQ_SIZE
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#define MSM_PMEM_CIQ3_BASE MSM_PMEM_CIQ_BASE
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#define MSM_PMEM_CIQ3_SIZE MSM_PMEM_CIQ_SIZE
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#endif
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#define MSM_FB_BASE 0x03B00000
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#define MSM_FB_SIZE 0x00300000
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#define MSM_EBI1_BANK0_BASE 0x20000000
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//#define MSM_EBI1_BANK0_SIZE 0x0E000000 /* radio < 3210 */
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#define MSM_EBI1_BANK0_SIZE 0x0E800000 /*for radio >=3210 */
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/* 4Gb/512MB DRAM */
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#define MSM_EBI1_BANK1_BASE 0x30000000
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#define MSM_EBI1_BANK1_SIZE 0x0C000000
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#define MSM_PMEM_MDP_BASE 0x3C000000
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#define MSM_PMEM_MDP_SIZE 0x02000000
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#define MSM_PMEM_ADSP_BASE 0x3E000000
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#define MSM_PMEM_ADSP_SIZE 0x02000000
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#define SUPERSONIC_GPIO_UP_INT_N 35
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#define SUPERSONIC_GPIO_UP_RESET_N 108
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#define SUPERSONIC_GPIO_TP_RST 34
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#define SUPERSONIC_GPIO_TP_INT_N 38
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#define SUPERSONIC_GPIO_TP_EN 100 /* V_TP3V3_EN */
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//#define SUPERSONIC_GPIO_POWER_KEY 94
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#define SUPERSONIC_GPIO_SDMC_CD_N 28
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/* BT */
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#define SUPERSONIC_GPIO_BT_UART1_RTS (43)
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#define SUPERSONIC_GPIO_BT_UART1_CTS (44)
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#define SUPERSONIC_GPIO_BT_UART1_RX (45)
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#define SUPERSONIC_GPIO_BT_UART1_TX (46)
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#define SUPERSONIC_GPIO_BT_RESET_N (27)
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#define SUPERSONIC_GPIO_BT_SHUTDOWN_N (146)
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#define SUPERSONIC_GPIO_BT_HOST_WAKE (86)
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#define SUPERSONIC_GPIO_BT_CHIP_WAKE (87)
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#define SUPERSONIC_GPIO_COMPASS_RST_N 107
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#define SUPERSONIC_GPIO_COMPASS_INT_N 36
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#define SUPERSONIC_PROJECT_NAME "supersonic"
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#define SUPERSONIC_LAYOUTS { \
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{ { 0, 1, 0}, { -1, 0, 0}, {0, 0, 1} }, \
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{ { 0, -1, 0}, { -1, 0, 0}, {0, 0, 1} }, \
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{ { -1, 0, 0}, { 0, -1, 0}, {0, 0, 1} }, \
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{ { 1, 0, 0}, { 0, 0, 1}, {0, 1, 0} } \
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}
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/* Proximity */
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#define SUPERSONIC_GPIO_PROXIMITY_EN_N 109
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/* Battery */
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#define SUPERSONIC_GPIO_MBAT_IN 39
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#define SUPERSONIC_GPIO_MCHG_EN_N 22
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#define SUPERSONIC_GPIO_ISET 16
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/*Audio */
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#define SUPERSONIC_AUD_JACKHP_EN 157
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#define SUPERSONIC_AUD_2V5_EN 26
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#define SUPERSONIC_AUD_SPK_EN 129
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/* Bluetooth PCM */
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#define SUPERSONIC_BT_PCM_OUT 68
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#define SUPERSONIC_BT_PCM_IN 69
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#define SUPERSONIC_BT_PCM_SYNC 70
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#define SUPERSONIC_BT_PCM_CLK 71
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//#define SUPERSONIC_MENU_KEY 40
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#define SUPERSONIC_VOLUME_UP 41
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#define SUPERSONIC_VOLUME_DOWN 42
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#define SUPERSONIC_POWER_KEY 94
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/* flash light */
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#define SUPERSONIC_GPIO_FLASHLIGHT_FLASH (84)
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#define SUPERSONIC_GPIO_FLASHLIGHT_TORCH (85)
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#define SUPERSONIC_GPIO_FLASHLIGHT_FLASH_ADJ (31)
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/* AP Key Led turn on*/
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#define SUPERSONIC_AP_KEY_LED_EN (32)
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/* UART/USB switch : high -> UART, low -> HSUSB */
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#define SUPERSONIC_USB_UARTz_SW 33
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#define SUPERSONIC_WIMAX_CPU_UARTz_SW 160
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/* USB PHY 3V3 enable*/
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#define SUPERSONIC_USB_PHY_3V3_ENABLE (104)
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#define SUPERSONIC_GPIO_USB_CABLE_IN_PIN (82)
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#define SUPERSONIC_GPIO_USB_ID_PIN (37)
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/* 35mm headset */
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#define SUPERSONIC_GPIO_35MM_HEADSET_DET (153)
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#if 0 /* TODO */
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//#define SUPERSONIC_GPIO_H2W_POWER (27)
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//#define SUPERSONIC_GPIO_CABLE_IN1 (38)
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#define SUPERSONIC_GPIO_CABLE_IN (37)
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//#define SUPERSONIC_GPIO_H2W_DATA (139)
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//#define SUPERSONIC_GPIO_H2W_CLK (140)
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#endif
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/* UART1*/
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#define SUPERSONIC_GPIO_UART1_RX (139)
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#define SUPERSONIC_GPIO_UART1_TX (140)
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/* Wifi */
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#define SUPERSONIC_GPIO_WIFI_SHUTDOWN_N 147
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#define SUPERSONIC_GPIO_WIFI_IRQ 152
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/*camera*/
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#define SUPERSONIC_MAINCAM_PWD 105
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#define SUPERSONIC_MAINCAM_RST 99
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#define SUPERSONIC_2NDCAM_PWD 120
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#define SUPERSONIC_CLK_SWITCH 102
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#define SUPERSONIC_LCD_RST (113)
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unsigned supersonic_get_skuid(void);
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/* HDMI */
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#define HDMI_RST (111)
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#define V_HDMI_1V2_EN (119)
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#define V_VGA_5V_SIL9022A_EN (127)
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#define V_HDMI_3V3_EN (128)
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#define SUPERSONIC_I2S_CLK (142)
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#define SUPERSONIC_I2S_WS (143)
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#define SUPERSONIC_I2S_DOUT (145)
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/* LCD RGB */
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#define SUPERSONIC_LCD_R0 (114)
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#define SUPERSONIC_LCD_R1 (115)
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#define SUPERSONIC_LCD_R2 (116)
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#define SUPERSONIC_LCD_R3 (117)
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#define SUPERSONIC_LCD_R4 (118)
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#define SUPERSONIC_LCD_G0 (121)
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#define SUPERSONIC_LCD_G1 (122)
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#define SUPERSONIC_LCD_G2 (123)
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#define SUPERSONIC_LCD_G3 (124)
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#define SUPERSONIC_LCD_G4 (125)
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#define SUPERSONIC_LCD_G5 (126)
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#define SUPERSONIC_LCD_B0 (130)
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#define SUPERSONIC_LCD_B1 (131)
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#define SUPERSONIC_LCD_B2 (132)
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#define SUPERSONIC_LCD_B3 (133)
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#define SUPERSONIC_LCD_B4 (134)
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#define SUPERSONIC_LCD_PCLK (135)
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#define SUPERSONIC_LCD_VSYNC (136)
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#define SUPERSONIC_LCD_HSYNC (137)
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#define SUPERSONIC_LCD_DE (138)
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#define SUPERSONIC_GPIO_PS_HOLD (25)
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int __init supersonic_init_panel(void);
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#endif /* __ARCH_ARM_MACH_MSM_BOARD_SUPERSONIC_H */
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