103 lines
3.1 KiB
C
103 lines
3.1 KiB
C
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/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Code Aurora Forum, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_SPM_H
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#define __ARCH_ARM_MACH_MSM_SPM_H
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enum {
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MSM_SPM_MODE_CLOCK_GATING,
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MSM_SPM_MODE_POWER_RETENTION,
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MSM_SPM_MODE_POWER_COLLAPSE,
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MSM_SPM_MODE_NR
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};
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enum {
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MSM_SPM_REG_SAW_CFG,
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MSM_SPM_REG_SAW_SPM_CTL,
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MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY,
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MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY,
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MSM_SPM_REG_SAW_SLP_CLK_EN,
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MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN,
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MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN,
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MSM_SPM_REG_SAW_SLP_CLMP_EN,
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MSM_SPM_REG_SAW_SLP_RST_EN,
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MSM_SPM_REG_SAW_SPM_MPM_CFG,
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MSM_SPM_REG_NR_INITIALIZE,
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MSM_SPM_REG_SAW_VCTL = MSM_SPM_REG_NR_INITIALIZE,
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MSM_SPM_REG_SAW_STS,
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MSM_SPM_REG_SAW_SPM_PMIC_CTL,
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MSM_SPM_REG_NR
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};
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struct msm_spm_platform_data {
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void __iomem *reg_base_addr;
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uint32_t reg_init_values[MSM_SPM_REG_NR_INITIALIZE];
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uint8_t awake_vlevel;
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uint8_t retention_vlevel;
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uint8_t collapse_vlevel;
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uint8_t retention_mid_vlevel;
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uint8_t collapse_mid_vlevel;
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uint32_t vctl_timeout_us;
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};
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#ifdef CONFIG_ARCH_MSM7X30
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int msm_spm_set_low_power_mode(unsigned int mode, bool notify_rpm);
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int msm_spm_set_vdd(unsigned int vlevel);
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void msm_spm_reinit(void);
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int msm_spm_init(struct msm_spm_platform_data *data, int nr_devs);
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#else
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static inline int msm_spm_set_low_power_mode(unsigned int mode, bool notify_rpm)
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{
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return -ENOSYS;
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}
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static inline int msm_spm_set_vdd(unsigned int vlevel)
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{
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return -ENOSYS;
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}
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static inline void msm_spm_reinit(void)
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{
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/* empty */
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}
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static inline int msm_spm_init(struct msm_spm_platform_data *data, int nr_devs)
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{
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return -ENOSYS;
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}
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#endif /* CONFIG_MSM_SPM */
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#endif /* __ARCH_ARM_MACH_MSM_SPM_H */
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