60 lines
1.8 KiB
ArmAsm
60 lines
1.8 KiB
ArmAsm
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/*
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* arch/sh/kernel/cpu/sh3/ex.S
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*
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* The SH-3 and SH-4 exception vector table.
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* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
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* Copyright (C) 2003 - 2008 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/linkage.h>
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#if !defined(CONFIG_MMU)
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#define tlb_miss_load exception_error
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#define tlb_miss_store exception_error
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#define initial_page_write exception_error
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#define tlb_protection_violation_load exception_error
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#define tlb_protection_violation_store exception_error
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#define address_error_load exception_error
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#define address_error_store exception_error
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#endif
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#if !defined(CONFIG_SH_FPU)
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#define fpu_error_trap_handler exception_error
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#endif
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#if !defined(CONFIG_KGDB)
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#define kgdb_handle_exception exception_error
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#endif
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.align 2
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.data
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ENTRY(exception_handling_table)
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.long exception_error /* 000 */
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.long exception_error
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.long tlb_miss_load /* 040 */
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.long tlb_miss_store
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.long initial_page_write
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.long tlb_protection_violation_load
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.long tlb_protection_violation_store
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.long address_error_load
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.long address_error_store /* 100 */
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.long fpu_error_trap_handler /* 120 */
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.long exception_error /* 140 */
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.long system_call ! Unconditional Trap /* 160 */
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.long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
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.long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
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.long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger
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.long break_point_trap /* 1E0 */
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/*
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* Pad the remainder of the table out, exceptions residing in far
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* away offsets can be manually inserted in to their appropriate
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* location via set_exception_table_{evt,vec}().
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*/
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.balign 4096,0,4096
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